Suppression of hysteresis in ultrathin tellurium transistors

Why this tiny switch matters

Every digital gadget relies on billions of tiny switches called transistors. As engineers try to pack more of these switches into ever smaller spaces, they are exploring new materials that can work in stacked, three-dimensional chips. This study focuses on ultrathin films of tellurium, a rare element that can carry positive charges very well, and asks a practical question: how can we make tellurium transistors switch cleanly and reliably instead of behaving in a jumpy, memory-like way?

The promise and problem of tellurium

Tellurium has recently attracted attention as a strong candidate for the “missing half” of future low-power circuits: efficient p-type transistors that carry positive charges. It offers high charge mobility, can be made only a few nanometers thick, and can be processed at relatively low temperatures that are friendly to existing silicon manufacturing lines. However, tellurium devices often show a large mismatch between how they turn on when the control voltage is swept forward and how they turn off when it is swept back. This effect, known as hysteresis, makes the switching point drift and undermines the stability needed for logic and memory chips.

Gas molecules as unseen troublemakers

The researchers first examined tellurium films grown by a cryogenic evaporation method that yields smooth, crystalline layers suitable for advanced devices. When they measured exposed devices in ordinary air, the current versus voltage curves showed strong hysteresis and sudden jumps. Running the same tests in a vacuum sharply reduced this effect, pointing to the role of molecules in the surrounding air. The team proposed that polar gas molecules landing on the tellurium surface act like tiny rotating sticks that respond to the applied voltage. As the voltage sweep direction changes, these dipoles reorient, temporarily boosting or depleting charge in the channel and causing abrupt current changes and large shifts in the apparent threshold voltage.

Sealing the surface and taming charge traps

To deal with these surface effects, the team added thin insulating caps on top of the tellurium. They compared silicon dioxide and aluminum oxide layers, both deposited at low temperatures that keep the material intact. Simply covering the tellurium substantially reduced the gas-driven hysteresis, confirming that blocking air molecules is an effective first step. Devices capped with aluminum oxide performed best, showing higher current, better mobility, and more stable behavior than those capped with silicon dioxide. Still, a smaller but noticeable hysteresis remained, especially when the control voltage was swept over a wide range or at slow rates, suggesting that charges were being trapped inside or near the insulating layers themselves.

Dual control for rock-steady switching

To further stabilize the device, the researchers built a dual-gate structure in which the ultrathin tellurium layer is sandwiched between aluminum oxide on both sides and controlled by top and bottom gates. This design not only shields the channel from the environment but also gives tighter electrostatic control. Measurements showed that the dual-gate devices had very small hysteresis, smooth current curves without sudden jumps, and high on/off ratios under normal air. Even when the gate voltage was swept extremely slowly or when the devices were held under bias for many minutes, the hysteresis stayed below about one volt and the switching current remained nearly constant.

What this means for future chips

In simple terms, the study shows that the jumpy behavior of ultrathin tellurium transistors mainly comes from air molecules clinging to the surface and reorienting as the device is operated, with a smaller contribution from trapped charges in the insulating layers. By sealing the tellurium in dense aluminum oxide and using two gates to control it, the team turns a fickle switch into a stable one with strong performance. This approach brings tellurium devices closer to practical use in stacked, three-dimensional chip layouts, where reliable p-type transistors are essential for low-power and high-density electronics.

Citation: Wang, ST., Li, KW., Weng, TT. et al. Suppression of hysteresis in ultrathin tellurium transistors. npj 2D Mater Appl 10, 55 (2026). https://doi.org/10.1038/s41699-026-00686-1

Keywords: tellurium transistors, hysteresis, dual gate devices, 2D semiconductors, 3D chip integration