Influence of programming-pulse properties on weight-update characteristics of charge-trapping IGZO synaptic transistors

Smarter AI Hardware Inspired by the Brain

Artificial intelligence today runs mostly on power-hungry digital chips. This study explores a different path, using special electronic devices that act more like brain synapses and can store learning directly in hardware. The researchers show how carefully shaping the timing of voltage pulses can make these tiny devices remember better while still using very little energy, a step toward more efficient AI in phones, sensors, and edge gadgets.

Tiny Switches That Learn Like Synapses

The work centers on thin-film transistors made from amorphous indium gallium zinc oxide, a transparent semiconductor already used in some display technologies. In these devices, a low-temperature silicon oxide layer beneath the channel contains many defects that can temporarily trap and release electrons. Each transistor behaves like a synapse whose strength is set by how many electrons sit in these traps, much as biological synapses strengthen or weaken as signals pass between neurons. By sending a sequence of electrical pulses to the gate of the transistor, the team can gradually lower or raise the current that flows, mimicking how synaptic weight changes during learning.

How Pulse Timing Shapes Electronic Memory

A key question is how the width of each programming pulse affects this electronic memory. The authors compare three pulse widths lasting 1.5, 3, or 6 seconds while keeping other conditions such as pulse height, total training time, and duty cycle under tight control. Short pulses carry less energy, so fewer electrons move into deeper traps, while very long pulses give more time for the device to relax or recover during the reading steps. When all three pulse schemes are given the same total on and off time, the mid-range case of 3 seconds produces the largest swing between the weakest and strongest synaptic states, meaning it offers the biggest usable range for storing learned weights.

Separating True Learning from Simple Relaxation

Because the transistor naturally drifts back toward its original state during readout, the team performs a second set of experiments to separate this recovery from genuine learning. This time they fix the number of pulses and the recovery time between them, adjusting the duty cycle so that longer pulses still share the same read conditions. Under this fairer comparison, the longer the pulse, the more electrons become trapped in the oxide and the deeper the device moves into its memory state. The result is a steadily increasing dynamic ratio, a measure of how much the device conductance can be tuned, with the 6 second pulses giving the widest and most controllable weight range.

From Single Devices to Recognizing Handwritten Digits

To see what this means for real computation, the researchers feed their measured device behavior into an analog AI accelerator simulator. They model an artificial neural network that recognizes handwritten digits from the MNIST dataset, wiring many of these synaptic transistors into a virtual crossbar array. Because the devices operate at very low current in the subthreshold region, noise and recovery effects can blur the stored weights. Even so, the network achieves recognition accuracies around 80, 87, and 90 percent for pulse widths of 1.5, 3, and 6 seconds, respectively. This close tracking between the usable weight range and recognition accuracy shows that better control of charge trapping directly improves learning quality.

Why Pulse Design Matters for Future Low Power AI

In plain terms, the study shows that these oxide transistors remember information through how long and how strongly they are pulsed, just as a brain synapse changes with repeated activity. Very short pulses do not push enough charge into deep memory states, while very long pulses must be balanced against how fast the device forgets during reading. By tuning both the pulse width and how often the device rests between pulses, engineers can expand the memory range and boost pattern recognition without raising the operating voltage. This insight points toward brain inspired hardware that can run AI tasks efficiently by storing and updating knowledge directly in vast grids of synaptic transistors.

Citation: Ko, Y., Ryu, J., Pi, J. et al. Influence of programming-pulse properties on weight-update characteristics of charge-trapping IGZO synaptic transistors. Sci Rep 16, 15031 (2026). https://doi.org/10.1038/s41598-026-44949-9

Keywords: neuromorphic hardware, synaptic transistor, IGZO, programming pulse width, analog AI