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Decoding correlated errors in quantum LDPC codes

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Why this matters for future quantum computers

Quantum computers are famously fragile: tiny disturbances can flip the state of their qubits and ruin a calculation. Quantum error-correcting codes are supposed to catch and fix these errors in real time, but doing so fast enough and accurately enough is a major roadblock on the way to practical machines. This paper shows how to decode a leading family of quantum codes much more reliably and quickly, even when errors are strongly correlated, pushing real-time fault-tolerant quantum computing closer to reality.

Figure 1
Figure 1.

The challenge of untangling quantum errors

Modern quantum error correction often relies on quantum low-density parity-check (QLDPC) codes, which promise high performance with relatively modest overhead. In principle, these codes should benefit from the same lightweight, message-passing decoders that made classical communication systems so successful. In practice, they do not: the graphical structures that describe quantum codes are full of very short loops, especially when all three basic error types on a qubit (bit flip, phase flip, and combined flips) are allowed. These short loops confuse message-passing algorithms, causing them to get stuck on certain error patterns and produce unreliable estimates—especially when different error types occur together in a correlated way, as happens in realistic quantum circuits.

Rewiring the error map instead of the algorithm

Rather than inventing yet another complex decoding rule, the authors take a different approach: they change the graph on which decoding runs. They introduce a method called graph augmentation and rewiring for inference (GARI). The key idea is to identify tightly connected patterns in the decoding graph—particularly four-node loops that involve a troublesome combined error on a qubit—and systematically replace them with a slightly larger but better structured pattern. This is done by adding new “effective” error and check nodes that stand in for groups of original nodes. The transformation guarantees that the underlying decoding problem is mathematically equivalent: no information about the physical errors is lost, but the graph becomes friendlier to inference.

Turning a messy picture into one that decoders can read

On the level of the underlying matrices that define the code, the original detector error model mixes information from many places in the circuit and from all three error types, creating huge clusters of short loops. GARI effectively breaks up these clusters by redirecting how errors are represented, especially those involving the combined error type. The resulting “GARI matrix” has far fewer short cycles and a lower average connectivity in the parts that matter most for correlated errors. That means a standard, well-understood normalized min-sum message-passing algorithm can now operate much closer to its ideal behavior, passing more reliable probabilistic messages through the graph. Importantly, this cleaner structure also reduces the total number of connections the decoder must process, which helps when mapping the algorithm to hardware.

Many decoders working in parallel, but quickly

Building on the improved graph, the authors design a hybrid decoding strategy that balances speed and resource use. They use a normalized min-sum decoder with a schedule that updates some checks one by one and others in small parallel layers. This is particularly well suited to implementation on field-programmable gate arrays (FPGAs), where wiring and clock speed are critical. To boost reliability further, they run a modest ensemble of such decoders in parallel, each with a slightly different random update order. As soon as any decoder finds an error pattern that matches the measured data, the whole ensemble stops, and that solution is taken. This “race to convergence” squeezes out extra accuracy without significantly increasing the average decoding time.

Figure 2
Figure 2.

Beating leading decoders while staying real-time

Using bivariate bicycle quantum codes of distances 6, 10, and 12 as benchmarks, the new method matches or surpasses several state-of-the-art decoders that were previously considered gold standards for handling correlated errors. For the largest code studied, the logical error rate per round drops to about seven parts in a billion at a typical physical error rate of one in a thousand—on par with much heavier search-based methods and advanced ensemble decoders. Crucially, the authors also synthesize their design on a high-end FPGA and show that decoding can be completed in real time: for the distance-12 code, the average per-round latency is around 273 nanoseconds, and more than 99.99% of all decoding attempts finish within a microsecond, a timescale compatible with realistic error-correction cycles.

What this means for scaling up quantum machines

In accessible terms, this work shows how to redraw the roadmap that a decoder uses to interpret error signals so that a simple, fast algorithm can make much better sense of them. By cleaning up the structure behind the scenes and using several lightweight decoders in parallel, the authors simultaneously improve accuracy and meet strict timing constraints. While no one expects this family of methods to solve every error-correction challenge at arbitrarily large scales, the results demonstrate that message-passing decoders, when paired with clever graph design like GARI, can already support high-performance, real-time protection of quantum information—an important step toward practical fault-tolerant quantum computers.

Citation: Maan, A.S., Garcia Herrero, F.M., Paler, A. et al. Decoding correlated errors in quantum LDPC codes. Nat Commun 17, 3965 (2026). https://doi.org/10.1038/s41467-026-70556-3

Keywords: quantum error correction, LDPC codes, decoder hardware, correlated noise, message-passing algorithms