Multiscale investigation of thermal transport in β-Ga2O3-based heterointerfaces enabled by machine learning potential: cross-scale parameter

Why keeping cool matters for future electronics

As our phones, power converters, and data centers grow more powerful, they also grow hotter. Getting heat out of tiny, hard‑working chips is becoming one of the biggest obstacles to better electronics. This study looks at how to cool devices made from an emerging semiconductor, β‑gallium oxide, by placing it on different heat‑spreading materials. Using a chain of computer simulations that follow heat from individual atoms up to full devices, the authors show that the best heat sink on paper is not always the best in practice—and that the thin junction where two materials touch can make or break performance.

Following heat from atoms to whole devices

The researchers built a “multiscale” modeling framework that links three worlds: atoms, nanostructures, and complete chips. At the smallest scale, they used quantum‑level calculations to see how atoms in β‑gallium oxide and in three candidate substrate materials—silicon, silicon carbide, and diamond—vibrate and interact. They then trained a machine‑learning potential, a kind of smart force field, to mimic these expensive calculations with far less computing time. This allowed them to run large molecular dynamics simulations that track how heat, carried as atomic vibrations, flows across the junction where β‑gallium oxide meets each substrate. Finally, they fed those results into finite‑element models of full device stacks to predict temperature rise, power handling, and mechanical stress.

When the best heat sink is slowed at the junction

One might expect diamond, famed for its extremely high thermal conductivity, to be the ideal substrate. Surprisingly, the simulations show that the thermal boundary resistance—the difficulty heat experiences when crossing the interface—is highest for the β‑gallium oxide/diamond pair, and lowest for the β‑gallium oxide/silicon pair, with silicon carbide in between. At the same time, this boundary resistance drops as temperature rises, the opposite of what usually happens in bulk crystals. By analyzing the vibrational “fingerprints” of each material, the team finds that silicon’s vibrational spectrum overlaps best with that of β‑gallium oxide, making it easier for heat‑carrying vibrations to cross the junction. Diamond’s vibrations, especially at high frequencies, match poorly and require more complex, less efficient scattering processes, which raises the resistance at the interface.

Crystal direction and the shifting thermal bottleneck

β‑Gallium oxide itself is anisotropic: its ability to conduct heat depends strongly on crystal orientation. The simulations reveal that device stacks where the β‑gallium oxide layer is cut along certain directions ((010) and (001)) show lower interface resistance and better heat spreading than other cuts. When these detailed interface properties are built into full‑device models, the picture becomes more nuanced. For low‑conductivity substrates like silicon, the main bottleneck is the substrate bulk, and changing crystal orientation has only a modest effect. As the substrate conducts heat better—moving from silicon to silicon carbide and then to diamond—the bulk substrate becomes less limiting and the interface grows in importance. In diamond‑based devices, the junction can dominate the total temperature rise, and orientation‑dependent differences in maximum safe power can reach roughly forty percent.

Balancing cooling power and mechanical strain

The study also tracks how heat‑induced mechanical stress builds up in these layered structures. Better cooling does not automatically mean lower stress. For example, devices using diamond substrates run cooler overall but show stress patterns that depend sensitively on how the β‑gallium oxide crystal is oriented, due to mismatches in lattice spacing and thermal expansion. Some orientations that spread heat efficiently also concentrate stress at the interface, potentially threatening long‑term reliability. Designers must therefore balance heat removal against mechanical robustness when choosing both substrate and crystal cut.

What this means for next‑generation power chips

By tying together atomic‑level physics, nanoscale interfaces, and full‑device behavior, this work shows that cooling high‑power β‑gallium oxide electronics is not just a matter of picking the most conductive substrate. The thin interface layer, its temperature‑dependent resistance, and the crystal orientation of the active layer all play crucial roles. The simulations suggest that diamond‑based stacks could more than double the allowable power compared with silicon—if their interfaces are carefully engineered and mechanical stresses are managed. Beyond β‑gallium oxide, the multiscale approach demonstrated here offers a general roadmap for designing cooler, more reliable devices built from complex combinations of materials.

Citation: Sun, Z., Qi, Z., Song, Y. et al. Multiscale investigation of thermal transport in β-Ga₂O₃-based heterointerfaces enabled by machine learning potential: cross-scale parameter. npj Comput Mater 12, 130 (2026). https://doi.org/10.1038/s41524-026-02007-y

Keywords: thermal management, gallium oxide devices, heat flow at interfaces, machine learning simulations, power electronics cooling